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A low cost DRAM retention time and power consumption measurement platform

TU Kaiserslautern
DRAMMeasure is a low cost DRAM power consumption and retention error measurement platform. It consists of an FPGA-board and two expansion Printed Circuit Boards (PCBs), one as an adapter for the SO-DIMM slot and another for temperature control and current sensing. With this measurement platform it is possible to characterize the retention time behavior of different DRAM devices from several vendors, as well as, estimating the IDD currents of DRAM devices.


[1]  A Platform to Analyze DDR3 DRAM’s Power and Retention Time
M. Jung, D. Mathew, C. Rheinländer, C. Weis, N. Wehn. IEEE Design & Test, May, 2017.

[2]  Reverse Engineering of DRAMs: Row Hammer with Crosshair
M. Jung, C. Rheinländer, C. Weis, N. Wehn. International Symposium on Memory Systems (MEMSYS 2016), October, 2016, Washington, DC, USA.

A Detailed technical report will follow soon. For more information, or if you want to use the board please feel free to contact us.