Microelectronic Systems Design Research Group

DRAMMeasure

A low cost DRAM retention time and power consumption measurement platform
TU Kaiserslautern

DRAMMeasure is a low cost DRAM power consumption and retention error measurement platform for DDR3 and DDR4 DRAMs. It consists of an FPGA-board and two expansion Printed Circuit Boards (PCBs), one as an adapter for the SO-DIMM slot and another for temperature control and current sensing. With this measurement platform it is possible to characterize the retention time behavior of different DRAM devices from several vendors, as well as, estimating the IDD currents of DRAM devices. 

 

 

Measurement Infrastructure

References

[1] A Platform to Analyze DDR3 DRAM’s Power and Retention Time 
M. Jung, D. Mathew, C. Rheinländer, C. Weis, N. Wehn. IEEE Design & Test, May, 2017.
[2] Reverse Engineering of DRAMs: Row Hammer with Crosshair 
M. Jung, C. Rheinländer, C. Weis, N. Wehn. International Symposium on Memory Systems (MEMSYS 2016), October, 2016, Washington, DC, USA.
[3] An Analysis on Retention Error Behavior and Power Consumption of Recent DDR4 DRAMs
D, M. Mathew, M. Schultheis, C. C. Rheinländer, C. Sudarshan, M. Jung, C. Weis, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE) , March, 2018, Dresden, Germany

 

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