Microelectronic Systems Design Research Group

DRAMSpec

A High-Level DRAM Timing, Power and Area Exploration Tool
TU Kaiserslautern

DRAMSpec - DRAM Current and Timing Generator is an open Source Tool which generates the Datasheet values of DRAM chips. This tool can be used to Explore new DRAM Architectures and to model existing DRAM chips.

Publications:

  • A High-Level DRAM Timing, Power and Area Exploration Tool
    O. Naji, A. Hansson, C. Weis, M. Jung, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2015, Samos Island, Greece.
    Link
  • DRAMSpec: A High-Level DRAM Timing, Power and Area Exploration Tool
    C. Weis, A. Mutaal, O. Naji, M. Jung, A. Hansson, N. Wehn. International Journal of Parallel Programming (IJPP), Springer, 2016.
    Link

Get it on Github

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